
#define Mode_USR 0x10
#define Mode_FIQ 0x11
#define Mode_IRQ 0x12
#define Mode_SVC 0x13
#define Mode_MON 0x16
#define Mode_ABT 0x17
#define Mode_HYP 0x1a
#define Mode_UND 0x1b
#define Mode_SYS 0x1f
#define I_Bit    0x80
#define F_Bit    0x40

.section .text.start, "ax"
.global asm_start
asm_start:
    //enter svc mode and set the stack pointer
    // word gs_svc_stack[NR_CORE][1024]
    // sp_core = gs_svc_stack + 1024*(core+1)*4
    //         = gs_svc_stack + (core+1)<<12
    msr cpsr_c, #Mode_SVC|I_Bit|F_Bit //disable irq and fiq
    //get processor coreid
    mrc p15, 0, r0, c0, c0, 5
    and r0, r0, #3 
    mov r11, r0
    add r0, r0, #1
    ldr sp, =gSVCStack
    add sp, sp, r0, lsl #12
    msr cpsr_c, #Mode_IRQ|I_Bit|F_Bit //disable irq and fiq
    ldr sp, =gIRQStack
    add sp, sp, r0, lsl #12
    msr cpsr_c, #Mode_SVC|I_Bit|F_Bit //disable irq and fiq

    bl  enable_l1_cache
    bl  enable_scu
    mov r0, r11
    bl  join_smp
    bl  enable_l1_cache
    cmp r11, #0
    bne ap_core_init
    b  startup_astrial
ap_core_init:
    b  startup_apcore

.data
.balign 16*1024
.global gSVCStack
gSVCStack: .skip 4096*8 
gIRQStack: .skip 4096*8 
.end
